May 11 Webinar: Examining the Latest Standards in Small Form Factor (SFF) Rugged Computing
Date: Wednesday, May 11, 2022
Weather: 1:00 p.m. EDT / 12:00 p.m. CDT / 10:00 a.m. PDT / 5:00 p.m. GMT
Sponsor: Elma
Duration: 1 hour
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Description of the webinar
In recent years, significant efforts have brought open standards to the forefront of next-generation designs to meet the Modular Open Standards Approach (MOSA) initiatives.
As work to bring open standards architectures such as OpenVPX to the SOSA 1.0 technical reference standard, for multi-mission defense platforms, it has become clear that there is a need for form factors smaller than 3U VPX to meet severe SWaP constraints while maintaining the scalability and interoperability offered by OpenVPX and SOSA.
This webcast will examine two such smaller form factor open standards initiatives that are being discussed in both the VITA trade association as well as the SOSA consortium – VITA 74 VNX/VITA 90 VNX+ and Short VPX. Speakers will discuss the ramifications of designing ever-smaller platforms while trying to meet the ever-increasing power and cooling demands of high-performance processors. Considerations of signal integrity and aperture ramifications along with examples of applications that can benefit from them will be discussed.
Presented by:
Patrick Collier
Senior Open Systems Engineer
Aspen Consulting Group Inc.
Patrick Collier is a Principal Open Systems Architect and Systems Engineer at Aspen Consulting Group. It focuses on the development and use of open architectures for space and non-space applications. Previously, he was a senior hardware engineer at PMA-209 NAVAIR, where he focused on developing the Hardware Open Systems Technology (HOST) set of standards. He is a co-founder of Sensor Open System Architecture (SOSA) and chair of its hardware subcommittee and compliance standing committee.
Marc Littlefield
Sr. Mgr., Embedded Computing Solutions
Elma Electronics
Mark Littlefield is Senior Director of Embedded Computing Products and Services for Elma Electronic. He is an active contributor to several VITA and SOSA technical working groups, leads the SOSA Small Form Factor (SFF) subcommittee, and was co-chair of the VITA 65 OpenVPX working group. He has more than 25 years of experience in embedded computing, where he held various technical and professional positions in the field of defence, medicine and commercial applications. Mark holds BS and MS degrees in Control Systems Engineering from the University of West Florida, where he wrote his thesis on a neural network approach to image processing.
John Riley
design engineer
Samtec
John Riley is a Senior Technical Marketing Engineer at Samtec. For over 20 years he has defined, designed, developed and tested high performance copper, RF and optical interconnects for a number of embedded computing applications. Additionally, he and his wife champion STEM education, advanced manufacturing techniques, and community outreach through their nonprofit makerspace. John holds a bachelor’s degree in mechanical engineering from the University of Louisville.
Moderated by:
John Keller
Chief Editor
Military and aerospace electronics
